VLSI Test Principles and Architecture Design for Textability
Wang, Laung-Terng
VLSI Test Principles and Architecture Design for Textability - New York Elsevier 2006 - 777p.
Chapter 1 – Introduction Chapter 2 – Design for Testability Chapter 3 – Logic and Fault Simulation Chapter 4 – Test Generation Chapter 5 – Logic Built-In Self-Test Chapter 6 – Test Compression Chapter 7 – Logic Diagnosis Chapter 8 – Memory Testing and Built-In Self-Test Chapter 9 – Memory Diagnosis and Built-In Self-Repair Chapter 10 – Boundary Scan and Core-Based Testing Chapter 11 – Analog and Mixed-Signal Testing Chapter 12 – Test Technology Trends in the Nanometer Age
Details
9789380501550
621.395 WAN-V
VLSI Test Principles and Architecture Design for Textability - New York Elsevier 2006 - 777p.
Chapter 1 – Introduction Chapter 2 – Design for Testability Chapter 3 – Logic and Fault Simulation Chapter 4 – Test Generation Chapter 5 – Logic Built-In Self-Test Chapter 6 – Test Compression Chapter 7 – Logic Diagnosis Chapter 8 – Memory Testing and Built-In Self-Test Chapter 9 – Memory Diagnosis and Built-In Self-Repair Chapter 10 – Boundary Scan and Core-Based Testing Chapter 11 – Analog and Mixed-Signal Testing Chapter 12 – Test Technology Trends in the Nanometer Age
Details
9789380501550
621.395 WAN-V