Verilog HDL : A Guide to Digital Design

By:

Palnitkar, Samir

Contributor(s):

Samir Palnitkar

Material type: Text

TextPublication details: Pearson 2013ISBN:

9788177589184

DDC classification:

9788177589184

Online resources:

Click here to access online

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Books	Amity Central Library ASET ECE		621.392 PAL-V (Browse shelf(Opens below))	Link to resource	Available		19253
Books	Amity Central Library ASET ECE		621.392 PAL-V (Browse shelf(Opens below))	Link to resource	Available		19254
Books	Amity Central Library ASET ECE		621.392 PAL-V (Browse shelf(Opens below))	Link to resource	Available		19255
Books	Amity Central Library ASET ECE		621.392 PAL-V (Browse shelf(Opens below))	Link to resource	Available		19256
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Reference Book	Amity Central Library ASET ECE	Reference	621.392 PAL-V (Browse shelf(Opens below))	Link to resource	Not For Loan		19258
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Previous	621.392 PAL-V Verilog HDL : A Guide to Digital Design	621.392 PAL-V Verilog HDL : A Guide to Digital Design	621.392 PAL-V Verilog HDL : A Guide to Digital Design	621.392 PAL-V Verilog HDL : A Guide to Digital Design	621.392 PAL-V Verilog HDL : A Guide to Digital Design	621.392 ROT-D Digital Systems Design using VHDL	621.392 ROT-D Digital Systems Design using VHDL	Next

BASIC VERILOG TOPICS.
Overview of Digital Design with Verilog HDL.
Hierarchical Modeling Concepts.
Basic Concepts.
Modules and Ports.
Gate-Level Modeling.
Dataflow Modeling.
Behavioral Modeling.
Tasks and Functions.
Useful Modeling Techniques.
ADVANCED VERILOG TOPICS.
Timing and Delays.
Switch Level Modeling.
User-Defined Primitives.
Programming Language Interface.
Logic Synthesis with Verilog HDL.
Advanced Verification Techniques.

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